Inventors' Corner: U.S. Patent #7,741,722 – Through-wafer vias

This patent describes a technique that enables fabrication of vertically stacked, high-performance three-dimensional (3-D) computer chips. The invention creates “through-silicon vias,” which are vertical connections etched through a silicon wafer and filled with metal, to boost the speed at which data flows from chip-to-chip.



The vias enable chips and memory devices that are traditionally